FF_REG_D 621 libavcodec/x86/snowdsp.c "mov %1, %%"FF_REG_D" \n\t"\ FF_REG_D 622 libavcodec/x86/snowdsp.c "mov (%%"FF_REG_D"), %%"FF_REG_D" \n\t"\ FF_REG_D 623 libavcodec/x86/snowdsp.c "add %3, %%"FF_REG_D" \n\t" FF_REG_D 675 libavcodec/x86/snowdsp.c "%"FF_REG_c"","%"FF_REG_S"","%"FF_REG_D"","%"FF_REG_d""); FF_REG_D 700 libavcodec/x86/snowdsp.c "movdqa (%%"FF_REG_D"), %%xmm0 \n\t" FF_REG_D 706 libavcodec/x86/snowdsp.c "movdqa 16(%%"FF_REG_D"), %%xmm2\n\t" FF_REG_D 711 libavcodec/x86/snowdsp.c "mov %1, %%"FF_REG_D" \n\t" FF_REG_D 712 libavcodec/x86/snowdsp.c "mov "FF_PTR_SIZE"(%%"FF_REG_D"), %%"FF_REG_D"; \n\t" FF_REG_D 713 libavcodec/x86/snowdsp.c "add %3, %%"FF_REG_D" \n\t" FF_REG_D 715 libavcodec/x86/snowdsp.c "movdqa (%%"FF_REG_D"), %%xmm4 \n\t" FF_REG_D 720 libavcodec/x86/snowdsp.c "movdqa 16(%%"FF_REG_D"), %%xmm6\n\t" FF_REG_D 750 libavcodec/x86/snowdsp.c "paddw (%%"FF_REG_D"), %%xmm1 \n\t" FF_REG_D 751 libavcodec/x86/snowdsp.c "paddw 16(%%"FF_REG_D"), %%xmm5 \n\t" FF_REG_D 775 libavcodec/x86/snowdsp.c "mov %1, %%"FF_REG_D" \n\t"\ FF_REG_D 776 libavcodec/x86/snowdsp.c "mov (%%"FF_REG_D"), %%"FF_REG_D" \n\t"\ FF_REG_D 777 libavcodec/x86/snowdsp.c "add %3, %%"FF_REG_D" \n\t" FF_REG_D 801 libavcodec/x86/snowdsp.c "paddw "read_offset"(%%"FF_REG_D"), %%mm1 \n\t"\ FF_REG_D 802 libavcodec/x86/snowdsp.c "paddw "read_offset"+8(%%"FF_REG_D"), %%mm5 \n\t"\ FF_REG_D 823 libavcodec/x86/snowdsp.c "%"FF_REG_c"","%"FF_REG_S"","%"FF_REG_D"","%"FF_REG_d""); FF_REG_D 73 libswscale/x86/hscale_fast_bilinear_simd.c "movq %%mm0, (%%"FF_REG_D", %%"FF_REG_a") \n\t" FF_REG_D 110 libswscale/x86/hscale_fast_bilinear_simd.c "movq %%mm0, (%%"FF_REG_D", %%"FF_REG_a") \n\t" FF_REG_D 218 libswscale/x86/hscale_fast_bilinear_simd.c "mov %1, %%"FF_REG_D" \n\t" FF_REG_D 232 libswscale/x86/hscale_fast_bilinear_simd.c "add %%"FF_REG_a", %%"FF_REG_D" \n\t"\ FF_REG_D 240 libswscale/x86/hscale_fast_bilinear_simd.c "add %%"FF_REG_a", %%"FF_REG_D" \n\t"\ FF_REG_D 271 libswscale/x86/hscale_fast_bilinear_simd.c : "%"FF_REG_a, "%"FF_REG_c, "%"FF_REG_d, "%"FF_REG_S, "%"FF_REG_D FF_REG_D 307 libswscale/x86/hscale_fast_bilinear_simd.c "mov %1, %%"FF_REG_D" \n\t" FF_REG_D 321 libswscale/x86/hscale_fast_bilinear_simd.c "mov %6, %%"FF_REG_D" \n\t" // dst2 FF_REG_D 348 libswscale/x86/hscale_fast_bilinear_simd.c : "%"FF_REG_a, "%"FF_REG_c, "%"FF_REG_d, "%"FF_REG_S, "%"FF_REG_D