shift_1st         282 libde265/x86/sse-dct.cc #define add_1st (1 << (shift_1st - 1))
shift_1st         370 libde265/x86/sse-dct.cc     S0 = _mm_srai_epi32(S0, shift_1st);
shift_1st         378 libde265/x86/sse-dct.cc     S8 = _mm_srai_epi32(S8, shift_1st);
shift_1st         388 libde265/x86/sse-dct.cc     S0 = _mm_srai_epi32(S0, shift_1st);
shift_1st         396 libde265/x86/sse-dct.cc     S8 = _mm_srai_epi32(S8, shift_1st);
shift_1st         525 libde265/x86/sse-dct.cc     S0 = _mm_srai_epi32(S0, shift_1st);
shift_1st         533 libde265/x86/sse-dct.cc     S8 = _mm_srai_epi32(S8, shift_1st);
shift_1st         543 libde265/x86/sse-dct.cc     S0 = _mm_srai_epi32(S0, shift_1st);
shift_1st         551 libde265/x86/sse-dct.cc     S8 = _mm_srai_epi32(S8, shift_1st);
shift_1st         652 libde265/x86/sse-dct.cc     m128iA = _mm_srai_epi32(m128iA, shift_1st);        // Sum = Sum >> iShiftNum
shift_1st         654 libde265/x86/sse-dct.cc     m128Tmp = _mm_srai_epi32(m128Tmp, shift_1st);      // Sum = Sum >> iShiftNum
shift_1st         658 libde265/x86/sse-dct.cc     m128iD = _mm_srai_epi32(m128iD, shift_1st);        // Sum = Sum >> iShiftNum
shift_1st         661 libde265/x86/sse-dct.cc     m128Tmp = _mm_srai_epi32(m128Tmp, shift_1st);      // Sum = Sum >> iShiftNum
shift_1st         775 libde265/x86/sse-dct.cc         m128iA = _mm_srai_epi32(m128iA, shift_1st);        // Sum = Sum >> iShiftNum
shift_1st         777 libde265/x86/sse-dct.cc         m128Tmp = _mm_srai_epi32(m128Tmp, shift_1st);      // Sum = Sum >> iShiftNum
shift_1st         781 libde265/x86/sse-dct.cc         m128iD = _mm_srai_epi32(m128iD, shift_1st);        // Sum = Sum >> iShiftNum
shift_1st         784 libde265/x86/sse-dct.cc         m128Tmp = _mm_srai_epi32(m128Tmp, shift_1st);      // Sum = Sum >> iShiftNum
shift_1st         948 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E0l, O0l), shift_1st),
shift_1st         949 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E0h, O0h), shift_1st));
shift_1st         951 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E1l, O1l), shift_1st),
shift_1st         952 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E1h, O1h), shift_1st));
shift_1st         954 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E2l, O2l), shift_1st),
shift_1st         955 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E2h, O2h), shift_1st));
shift_1st         957 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E3l, O3l), shift_1st),
shift_1st         958 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E3h, O3h), shift_1st));
shift_1st         960 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E3l, O3l), shift_1st),
shift_1st         961 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E3h, O3h), shift_1st));
shift_1st         963 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E2l, O2l), shift_1st),
shift_1st         964 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E2h, O2h), shift_1st));
shift_1st         966 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E1l, O1l), shift_1st),
shift_1st         967 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E1h, O1h), shift_1st));
shift_1st         969 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E0l, O0l), shift_1st),
shift_1st         970 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E0h, O0h), shift_1st));
shift_1st        1294 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E0l, O0l), shift_1st),
shift_1st        1295 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E0h, O0h), shift_1st));
shift_1st        1297 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E1l, O1l), shift_1st),
shift_1st        1298 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E1h, O1h), shift_1st));
shift_1st        1300 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E2l, O2l), shift_1st),
shift_1st        1301 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E2h, O2h), shift_1st));
shift_1st        1303 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E3l, O3l), shift_1st),
shift_1st        1304 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_add_epi32(E3h, O3h), shift_1st));
shift_1st        1306 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E3l, O3l), shift_1st),
shift_1st        1307 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E3h, O3h), shift_1st));
shift_1st        1309 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E2l, O2l), shift_1st),
shift_1st        1310 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E2h, O2h), shift_1st));
shift_1st        1312 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E1l, O1l), shift_1st),
shift_1st        1313 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E1h, O1h), shift_1st));
shift_1st        1315 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E0l, O0l), shift_1st),
shift_1st        1316 libde265/x86/sse-dct.cc             _mm_srai_epi32(_mm_sub_epi32(E0h, O0h), shift_1st));
shift_1st        1590 libde265/x86/sse-dct.cc     shift = shift_1st;
shift_1st        2284 libde265/x86/sse-dct.cc     shift = shift_1st;
shift_1st        2979 libde265/x86/sse-dct.cc     shift = shift_1st;
shift_1st        5264 libde265/x86/sse-dct.cc     shift = shift_1st;