SH_IMM 58 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, op_imm | T(src1) | DA(EQUAL_FLAG) | SH_IMM(src2), EQUAL_FLAG)); \ SH_IMM 60 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, op_imm | T(src1) | D(dst) | SH_IMM(src2), DR(dst))); \ SH_IMM 90 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SLL | T(src2) | D(dst) | SH_IMM(24), DR(dst))); SH_IMM 91 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, SRA | T(dst) | D(dst) | SH_IMM(24), DR(dst)); SH_IMM 108 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SLL | T(src2) | D(dst) | SH_IMM(16), DR(dst))); SH_IMM 109 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, SRA | T(dst) | D(dst) | SH_IMM(16), DR(dst)); SH_IMM 135 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SRL | T(src2) | DA(EQUAL_FLAG) | SH_IMM(31), EQUAL_FLAG)); SH_IMM 147 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SLL | T(TMP_REG1) | D(TMP_REG1) | SH_IMM(1), UNMOVABLE_INS)); SH_IMM 192 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SLL | TA(ULESS_FLAG) | D(TMP_REG1) | SH_IMM(31), DR(TMP_REG1))); SH_IMM 195 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, SLL | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG) | SH_IMM(31), OVERFLOW_FLAG); SH_IMM 268 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SLL | TA(ULESS_FLAG) | D(TMP_REG1) | SH_IMM(31), DR(TMP_REG1))); SH_IMM 271 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, SRL | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG) | SH_IMM(31), OVERFLOW_FLAG); SH_IMM 312 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SRA | T(dst) | DA(UGREATER_FLAG) | SH_IMM(31), UGREATER_FLAG)); SH_IMM 87 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c ins |= SH_IMM(shift); SH_IMM 113 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL | TA(dst_ar) | DA(dst_ar) | SH_IMM(shift - shift2), dst_ar)); SH_IMM 115 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL | TA(dst_ar) | DA(dst_ar) | SH_IMM(shift2), dst_ar)); SH_IMM 148 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, ins | T(src1) | DA(EQUAL_FLAG) | SH_IMM(src2), EQUAL_FLAG)); \ SH_IMM 150 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, ins | T(src1) | D(dst) | SH_IMM(src2), DR(dst))); \ SH_IMM 178 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL32 | T(src2) | D(dst) | SH_IMM(24), DR(dst))); SH_IMM 179 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, DSRA32 | T(dst) | D(dst) | SH_IMM(24), DR(dst)); SH_IMM 192 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL32 | T(src2) | D(dst) | SH_IMM(16), DR(dst))); SH_IMM 193 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, DSRA32 | T(dst) | D(dst) | SH_IMM(16), DR(dst)); SH_IMM 203 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL32 | T(src2) | D(dst) | SH_IMM(0), DR(dst))); SH_IMM 204 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, DSRL32 | T(dst) | D(dst) | SH_IMM(0), DR(dst)); SH_IMM 208 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, SLL | T(src2) | D(dst) | SH_IMM(0), DR(dst)); SH_IMM 227 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DSRL32, SRL) | T(src2) | DA(EQUAL_FLAG) | SH_IMM(31), EQUAL_FLAG)); SH_IMM 239 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DSLL, SLL) | T(TMP_REG1) | D(TMP_REG1) | SH_IMM(1), UNMOVABLE_INS)); SH_IMM 284 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DSLL32, SLL) | TA(ULESS_FLAG) | D(TMP_REG1) | SH_IMM(31), DR(TMP_REG1))); SH_IMM 287 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, SELECT_OP(DSRL32, SLL) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG) | SH_IMM(31), OVERFLOW_FLAG); SH_IMM 360 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DSLL32, SLL) | TA(ULESS_FLAG) | D(TMP_REG1) | SH_IMM(31), DR(TMP_REG1))); SH_IMM 363 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, SELECT_OP(DSRL32, SRL) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG) | SH_IMM(31), OVERFLOW_FLAG); SH_IMM 407 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DSRA32, SRA) | T(dst) | DA(UGREATER_FLAG) | SH_IMM(31), UGREATER_FLAG)); SH_IMM 443 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL | T(dst) | D(dst) | SH_IMM(16), DR(dst))); SH_IMM 445 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL | T(dst) | D(dst) | SH_IMM(16), DR(dst))); SH_IMM 796 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(arg)) | D(TMP_REG3) | SH_IMM(argw), DR(TMP_REG3))); SH_IMM 1382 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, SRL | TA(EQUAL_FLAG) | DA(EQUAL_FLAG) | SH_IMM(23), EQUAL_FLAG)); SH_IMM 1390 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, SRL | TA(ULESS_FLAG) | DA(ULESS_FLAG) | SH_IMM(23), ULESS_FLAG)); SH_IMM 1393 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, SRL | TA(UGREATER_FLAG) | DA(UGREATER_FLAG) | SH_IMM(23), UGREATER_FLAG)); SH_IMM 2081 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, SRL | TA(sugg_dst_ar) | DA(sugg_dst_ar) | SH_IMM(23), sugg_dst_ar));