GenInstrImmediate 1072 src/mips/assembler-mips.cc   GenInstrImmediate(BEQ, rs, rt, offset);
GenInstrImmediate 1079 src/mips/assembler-mips.cc   GenInstrImmediate(REGIMM, rs, BGEZ, offset);
GenInstrImmediate 1087 src/mips/assembler-mips.cc   GenInstrImmediate(REGIMM, rs, BGEZAL, offset);
GenInstrImmediate 1094 src/mips/assembler-mips.cc   GenInstrImmediate(BGTZ, rs, zero_reg, offset);
GenInstrImmediate 1101 src/mips/assembler-mips.cc   GenInstrImmediate(BLEZ, rs, zero_reg, offset);
GenInstrImmediate 1108 src/mips/assembler-mips.cc   GenInstrImmediate(REGIMM, rs, BLTZ, offset);
GenInstrImmediate 1116 src/mips/assembler-mips.cc   GenInstrImmediate(REGIMM, rs, BLTZAL, offset);
GenInstrImmediate 1123 src/mips/assembler-mips.cc   GenInstrImmediate(BNE, rs, rt, offset);
GenInstrImmediate 1205 src/mips/assembler-mips.cc   GenInstrImmediate(ADDIU, rs, rd, j);
GenInstrImmediate 1248 src/mips/assembler-mips.cc   GenInstrImmediate(ANDI, rs, rt, j);
GenInstrImmediate 1259 src/mips/assembler-mips.cc   GenInstrImmediate(ORI, rs, rt, j);
GenInstrImmediate 1270 src/mips/assembler-mips.cc   GenInstrImmediate(XORI, rs, rt, j);
GenInstrImmediate 1351 src/mips/assembler-mips.cc     GenInstrImmediate(LB, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1354 src/mips/assembler-mips.cc     GenInstrImmediate(LB, at, rd, 0);  // Equiv to lb(rd, MemOperand(at, 0));
GenInstrImmediate 1361 src/mips/assembler-mips.cc     GenInstrImmediate(LBU, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1364 src/mips/assembler-mips.cc     GenInstrImmediate(LBU, at, rd, 0);  // Equiv to lbu(rd, MemOperand(at, 0));
GenInstrImmediate 1371 src/mips/assembler-mips.cc     GenInstrImmediate(LH, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1374 src/mips/assembler-mips.cc     GenInstrImmediate(LH, at, rd, 0);  // Equiv to lh(rd, MemOperand(at, 0));
GenInstrImmediate 1381 src/mips/assembler-mips.cc     GenInstrImmediate(LHU, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1384 src/mips/assembler-mips.cc     GenInstrImmediate(LHU, at, rd, 0);  // Equiv to lhu(rd, MemOperand(at, 0));
GenInstrImmediate 1391 src/mips/assembler-mips.cc     GenInstrImmediate(LW, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1394 src/mips/assembler-mips.cc     GenInstrImmediate(LW, at, rd, 0);  // Equiv to lw(rd, MemOperand(at, 0));
GenInstrImmediate 1400 src/mips/assembler-mips.cc   GenInstrImmediate(LWL, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1405 src/mips/assembler-mips.cc   GenInstrImmediate(LWR, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1411 src/mips/assembler-mips.cc     GenInstrImmediate(SB, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1414 src/mips/assembler-mips.cc     GenInstrImmediate(SB, at, rd, 0);  // Equiv to sb(rd, MemOperand(at, 0));
GenInstrImmediate 1421 src/mips/assembler-mips.cc     GenInstrImmediate(SH, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1424 src/mips/assembler-mips.cc     GenInstrImmediate(SH, at, rd, 0);  // Equiv to sh(rd, MemOperand(at, 0));
GenInstrImmediate 1431 src/mips/assembler-mips.cc     GenInstrImmediate(SW, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1434 src/mips/assembler-mips.cc     GenInstrImmediate(SW, at, rd, 0);  // Equiv to sw(rd, MemOperand(at, 0));
GenInstrImmediate 1440 src/mips/assembler-mips.cc   GenInstrImmediate(SWL, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1445 src/mips/assembler-mips.cc   GenInstrImmediate(SWR, rs.rm(), rd, rs.offset_);
GenInstrImmediate 1451 src/mips/assembler-mips.cc   GenInstrImmediate(LUI, zero_reg, rd, j);
GenInstrImmediate 1562 src/mips/assembler-mips.cc   GenInstrImmediate(SLTI, rs, rt, j);
GenInstrImmediate 1567 src/mips/assembler-mips.cc   GenInstrImmediate(SLTIU, rs, rt, j);
GenInstrImmediate 1623 src/mips/assembler-mips.cc   GenInstrImmediate(LWC1, src.rm(), fd, src.offset_);
GenInstrImmediate 1630 src/mips/assembler-mips.cc   GenInstrImmediate(LWC1, src.rm(), fd, src.offset_);
GenInstrImmediate 1633 src/mips/assembler-mips.cc   GenInstrImmediate(LWC1, src.rm(), nextfpreg, src.offset_ + 4);
GenInstrImmediate 1638 src/mips/assembler-mips.cc   GenInstrImmediate(SWC1, src.rm(), fd, src.offset_);
GenInstrImmediate 1645 src/mips/assembler-mips.cc   GenInstrImmediate(SWC1, src.rm(), fd, src.offset_);
GenInstrImmediate 1648 src/mips/assembler-mips.cc   GenInstrImmediate(SWC1, src.rm(), nextfpreg, src.offset_ + 4);
GenInstrImmediate 1176 src/mips/assembler-mips.h   void GenInstrImmediate(Opcode opcode,
GenInstrImmediate 1180 src/mips/assembler-mips.h   void GenInstrImmediate(Opcode opcode,
GenInstrImmediate 1184 src/mips/assembler-mips.h   void GenInstrImmediate(Opcode opcode,