B16 240 src/arm/assembler-arm.cc al | PostIndex | 4 | LeaveCC | I | kRegister_sp_Code * B16 | B16 245 src/arm/assembler-arm.cc al | B26 | 4 | NegPreIndex | kRegister_sp_Code * B16; B16 249 src/arm/assembler-arm.cc al | B26 | L | 4 | PostIndex | kRegister_sp_Code * B16; B16 253 src/arm/assembler-arm.cc const Instr kLdrPCMask = kCondMask | 15 * B24 | 7 * B20 | 15 * B16; B16 254 src/arm/assembler-arm.cc const Instr kLdrPCPattern = al | 5 * B24 | L | kRegister_pc_Code * B16; B16 257 src/arm/assembler-arm.cc 15 * B24 | 15 * B20 | 15 * B16 | 15 * B12 | 15 * B8 | 15 * B4; B16 259 src/arm/assembler-arm.cc B24 | B21 | 15 * B16 | 15 * B12 | 15 * B8 | BLX; B16 261 src/arm/assembler-arm.cc const Instr kMovMvnMask = 0x6d * B21 | 0xf * B16; B16 264 src/arm/assembler-arm.cc const Instr kMovLeaveCCMask = 0xdff * B16; B16 265 src/arm/assembler-arm.cc const Instr kMovLeaveCCPattern = 0x1a0 * B16; B16 277 src/arm/assembler-arm.cc al | B26 | L | Offset | kRegister_fp_Code * B16; B16 279 src/arm/assembler-arm.cc al | B26 | Offset | kRegister_fp_Code * B16; B16 281 src/arm/assembler-arm.cc al | B26 | L | NegOffset | kRegister_fp_Code * B16; B16 283 src/arm/assembler-arm.cc al | B26 | NegOffset | kRegister_fp_Code * B16; B16 877 src/arm/assembler-arm.cc emit(instr | rn.code()*B16 | rd.code()*B12); B16 913 src/arm/assembler-arm.cc emit(instr | am | x.rn_.code()*B16 | rd.code()*B12); B16 952 src/arm/assembler-arm.cc emit(instr | am | x.rn_.code()*B16 | rd.code()*B12); B16 960 src/arm/assembler-arm.cc emit(instr | rn.code()*B16 | rl); B16 985 src/arm/assembler-arm.cc emit(instr | am | x.rn_.code()*B16 | crd.code()*B12 | offset_8); B16 1061 src/arm/assembler-arm.cc emit(cond | B24 | B21 | 15*B16 | 15*B12 | 15*B8 | BLX | target.code()); B16 1068 src/arm/assembler-arm.cc emit(cond | B24 | B21 | 15*B16 | 15*B12 | 15*B8 | BX | target.code()); B16 1193 src/arm/assembler-arm.cc emit(cond | A | s | dst.code()*B16 | srcA.code()*B12 | B16 1202 src/arm/assembler-arm.cc emit(cond | s | dst.code()*B16 | src2.code()*B8 | B7 | B4 | src1.code()); B16 1214 src/arm/assembler-arm.cc emit(cond | B23 | B22 | A | s | dstH.code()*B16 | dstL.code()*B12 | B16 1227 src/arm/assembler-arm.cc emit(cond | B23 | B22 | s | dstH.code()*B16 | dstL.code()*B12 | B16 1240 src/arm/assembler-arm.cc emit(cond | B23 | A | s | dstH.code()*B16 | dstL.code()*B12 | B16 1253 src/arm/assembler-arm.cc emit(cond | B23 | s | dstH.code()*B16 | dstL.code()*B12 | B16 1262 src/arm/assembler-arm.cc emit(cond | B24 | B22 | B21 | 15*B16 | dst.code()*B12 | B16 1286 src/arm/assembler-arm.cc emit(cond | 0x6*B24 | 0xe*B20 | satpos*B16 | dst.code()*B12 | B16 1307 src/arm/assembler-arm.cc emit(cond | 0xf*B23 | B22 | B21 | (width - 1)*B16 | dst.code()*B12 | B16 1327 src/arm/assembler-arm.cc emit(cond | 0xf*B23 | B21 | (width - 1)*B16 | dst.code()*B12 | B16 1343 src/arm/assembler-arm.cc emit(cond | 0x1f*B22 | msb*B16 | dst.code()*B12 | lsb*B7 | B4 | 0xf); B16 1362 src/arm/assembler-arm.cc emit(cond | 0x1f*B22 | msb*B16 | dst.code()*B12 | lsb*B7 | B4 | B16 1370 src/arm/assembler-arm.cc emit(cond | B24 | s | 15*B16 | dst.code()*B12); B16 1376 src/arm/assembler-arm.cc ASSERT(fields >= B16 && fields < B20); // at least one field set B16 1549 src/arm/assembler-arm.cc emit(cond | B27 | B26 | B25 | (opcode_1 & 15)*B20 | crn.code()*B16 | B16 1572 src/arm/assembler-arm.cc emit(cond | B27 | B26 | B25 | (opcode_1 & 7)*B21 | crn.code()*B16 | B16 1595 src/arm/assembler-arm.cc emit(cond | B27 | B26 | B25 | (opcode_1 & 7)*B21 | L | crn.code()*B16 | B16 1627 src/arm/assembler-arm.cc emit(cond | B27 | B26 | U | l | L | rn.code()*B16 | crd.code()*B12 | B16 1668 src/arm/assembler-arm.cc emit(cond | u*B23 | 0xD1*B20 | base.code()*B16 | dst.code()*B12 | B16 1679 src/arm/assembler-arm.cc emit(cond | 0xD1*B20 | ip.code()*B16 | dst.code()*B12 | 0xB*B8); B16 1712 src/arm/assembler-arm.cc emit(cond | u*B23 | d*B22 | 0xD1*B20 | base.code()*B16 | sd*B12 | B16 1723 src/arm/assembler-arm.cc emit(cond | d*B22 | 0xD1*B20 | ip.code()*B16 | sd*B12 | 0xA*B8); B16 1753 src/arm/assembler-arm.cc emit(cond | u*B23 | 0xD0*B20 | base.code()*B16 | src.code()*B12 | B16 1764 src/arm/assembler-arm.cc emit(cond | 0xD0*B20 | ip.code()*B16 | src.code()*B12 | 0xB*B8); B16 1796 src/arm/assembler-arm.cc emit(cond | u*B23 | d*B22 | 0xD0*B20 | base.code()*B16 | sd*B12 | B16 1807 src/arm/assembler-arm.cc emit(cond | d*B22 | 0xD0*B20 | ip.code()*B16 | sd*B12 | 0xA*B8); B16 1837 src/arm/assembler-arm.cc emit(cond | B27 | B26 | am | d*B22 | B20 | base.code()*B16 | sd*B12 | B16 1858 src/arm/assembler-arm.cc emit(cond | B27 | B26 | am | d*B22 | base.code()*B16 | sd*B12 | B16 1878 src/arm/assembler-arm.cc emit(cond | B27 | B26 | am | d*B22 | B20 | base.code()*B16 | sd*B12 | B16 1899 src/arm/assembler-arm.cc emit(cond | B27 | B26 | am | d*B22 | base.code()*B16 | sd*B12 | B16 2033 src/arm/assembler-arm.cc emit(cond | 0xC*B24 | B22 | src2.code()*B16 | B16 2048 src/arm/assembler-arm.cc emit(cond | 0xC*B24 | B22 | B20 | dst2.code()*B16 | B16 2064 src/arm/assembler-arm.cc emit(cond | 0xE*B24 | sn*B16 | src.code()*B12 | 0xA*B8 | n*B7 | B4); B16 2079 src/arm/assembler-arm.cc emit(cond | 0xE*B24 | B20 | sn*B16 | dst.code()*B12 | 0xA*B8 | n*B7 | B4); B16 2182 src/arm/assembler-arm.cc return (cond | 0xE*B24 | B23 | D*B22 | 0x3*B20 | B19 | opc2*B16 | B16 2190 src/arm/assembler-arm.cc return (cond | 0xE*B24 | B23 | D*B22 | 0x3*B20 | 0x7*B16 | B16 2262 src/arm/assembler-arm.cc emit(cond | 0xE*B24 | 0xB*B20 | B16 | dst.code()*B12 | B16 2285 src/arm/assembler-arm.cc emit(cond | 0xE*B24 | 0x3*B20 | src1.code()*B16 | B16 2300 src/arm/assembler-arm.cc emit(cond | 0xE*B24 | 0x3*B20 | src1.code()*B16 | B16 2315 src/arm/assembler-arm.cc emit(cond | 0xE*B24 | 0x2*B20 | src1.code()*B16 | B16 2330 src/arm/assembler-arm.cc emit(cond | 0xE*B24 | B23 | src1.code()*B16 | B16 2357 src/arm/assembler-arm.cc emit(cond | 0xE*B24 |B23 | 0x3*B20 | B18 | B16 | B16 2367 src/arm/assembler-arm.cc emit(cond | 0xE*B24 | 0xE*B20 | B16 | B16 2377 src/arm/assembler-arm.cc emit(cond | 0xE*B24 | 0xF*B20 | B16 | B16 2388 src/arm/assembler-arm.cc emit(cond | 0xE*B24 | B23 | 0x3*B20 | B16 |