isreg 148 src/cmd/5a/a.h int isreg(Addr*); isreg 1370 src/cmd/5g/reg.c dumpone(Flow *f, int isreg) isreg 1377 src/cmd/5g/reg.c if(isreg) { isreg 1417 src/cmd/5g/reg.c dumpit(char *str, Flow *r0, int isreg) isreg 1423 src/cmd/5g/reg.c dumpone(r, isreg); isreg 161 src/cmd/6a/a.h int isreg(Addr*); isreg 428 src/cmd/6c/cgen.c if(isreg(l, D_AX)) { isreg 433 src/cmd/6c/cgen.c if(isreg(r, D_AX)) { isreg 450 src/cmd/6c/cgen.c if(isreg(l, D_DX)) { isreg 455 src/cmd/6c/cgen.c if(isreg(r, D_DX)) { isreg 759 src/cmd/6c/cgen.c if(isreg(l, D_AX)) { isreg 764 src/cmd/6c/cgen.c if(isreg(r, D_AX)) { isreg 781 src/cmd/6c/cgen.c if(isreg(l, D_DX)) { isreg 786 src/cmd/6c/cgen.c if(isreg(r, D_DX)) { isreg 242 src/cmd/6c/gc.h int isreg(Node*, int); isreg 1407 src/cmd/6c/txt.c if(f->op == OREGISTER && t != Z && isreg(t, D_AX) && reg[D_DX] == 0) isreg 1240 src/cmd/6g/reg.c dumpone(Flow *f, int isreg) isreg 1247 src/cmd/6g/reg.c if(isreg) { isreg 1287 src/cmd/6g/reg.c dumpit(char *str, Flow *r0, int isreg) isreg 1293 src/cmd/6g/reg.c dumpone(r, isreg); isreg 161 src/cmd/8a/a.h int isreg(Addr*); isreg 440 src/cmd/8c/cgen.c if(isreg(l, D_AX)) { isreg 445 src/cmd/8c/cgen.c if(isreg(r, D_AX)) { isreg 462 src/cmd/8c/cgen.c if(isreg(l, D_DX)) { isreg 467 src/cmd/8c/cgen.c if(isreg(r, D_DX)) { isreg 727 src/cmd/8c/cgen.c if(isreg(l, D_AX)) { isreg 732 src/cmd/8c/cgen.c if(isreg(r, D_AX)) { isreg 749 src/cmd/8c/cgen.c if(isreg(l, D_DX)) { isreg 754 src/cmd/8c/cgen.c if(isreg(r, D_DX)) { isreg 247 src/cmd/8c/gc.h int isreg(Node*, int); isreg 1278 src/cmd/8c/txt.c if(f->op == OREGISTER && t != Z && isreg(t, D_AX) && reg[D_DX] == 0) isreg 1209 src/cmd/8g/reg.c dumpone(Flow *f, int isreg) isreg 1216 src/cmd/8g/reg.c if(isreg) { isreg 1256 src/cmd/8g/reg.c dumpit(char *str, Flow *r0, int isreg) isreg 1262 src/cmd/8g/reg.c dumpone(r, isreg);