DR 46 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
DR 52 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, op_norm | S(src1) | T(src2) | D(dst), DR(dst))); \
DR 60 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, op_imm | T(src1) | D(dst) | SH_IMM(src2), DR(dst))); \
DR 66 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, op_v | S(src2) | T(src1) | D(dst), DR(dst))); \
DR 79 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, ADDU | S(src2) | TA(0) | D(dst), DR(dst));
DR 88 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, SEB | T(src2) | D(dst), DR(dst));
DR 90 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SLL | T(src2) | D(dst) | SH_IMM(24), DR(dst)));
DR 91 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, SRA | T(dst) | D(dst) | SH_IMM(24), DR(dst));
DR 94 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst));
DR 106 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, SEH | T(src2) | D(dst), DR(dst));
DR 108 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SLL | T(src2) | D(dst) | SH_IMM(16), DR(dst)));
DR 109 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, SRA | T(dst) | D(dst) | SH_IMM(16), DR(dst));
DR 112 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst));
DR 123 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, NOR | S(src2) | T(src2) | D(dst), DR(dst)));
DR 132 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, CLZ | S(src2) | T(dst) | D(dst), DR(dst)));
DR 139 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDU | S(src2) | TA(0) | D(TMP_REG1), DR(TMP_REG1)));
DR 143 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(dst) | IMM(-1), DR(dst)));
DR 145 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDIU | S(dst) | T(dst) | IMM(1), DR(dst)));
DR 173 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDIU | S(src1) | T(dst) | IMM(src2), DR(dst)));
DR 184 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDU | S(src1) | T(src2) | D(dst), DR(dst)));
DR 192 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SLL | TA(ULESS_FLAG) | D(TMP_REG1) | SH_IMM(31), DR(TMP_REG1)));
DR 207 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDIU | S(src1) | T(dst) | IMM(src2), DR(dst)));
DR 212 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDU | S(src1) | T(src2) | D(dst), DR(dst)));
DR 217 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDU | S(dst) | TA(ULESS_FLAG) | D(dst), DR(dst)));
DR 228 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
DR 246 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDIU | S(src1) | T(dst) | IMM(-src2), DR(dst)));
DR 263 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SUBU | S(src1) | T(src2) | D(dst), DR(dst)));
DR 268 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SLL | TA(ULESS_FLAG) | D(TMP_REG1) | SH_IMM(31), DR(TMP_REG1)));
DR 275 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
DR 284 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, ADDIU | S(src1) | T(dst) | IMM(-src2), DR(dst)));
DR 290 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SUBU | S(src1) | T(src2) | D(dst), DR(dst)));
DR 296 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, SUBU | S(dst) | TA(ULESS_FLAG) | D(dst), DR(dst)));
DR 303 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, MUL | S(src1) | T(src2) | D(dst), DR(dst));
DR 306 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, MFLO | D(dst), DR(dst));
DR 311 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, MFLO | D(dst), DR(dst)));
DR 346 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c FAIL_IF(push_inst(compiler, LUI | T(dst) | IMM(init_value >> 16), DR(dst)));
DR 347 ext/pcre/pcrelib/sljit/sljitNativeMIPS_32.c return push_inst(compiler, ORI | S(dst) | T(dst) | IMM(init_value), DR(dst));
DR 129 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
DR 135 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, op_norm | S(src1) | T(src2) | D(dst), DR(dst))); \
DR 150 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, ins | T(src1) | D(dst) | SH_IMM(src2), DR(dst))); \
DR 157 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, ins | S(src2) | T(src1) | D(dst), DR(dst))); \
DR 170 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src2) | TA(0) | D(dst), DR(dst));
DR 178 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL32 | T(src2) | D(dst) | SH_IMM(24), DR(dst)));
DR 179 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, DSRA32 | T(dst) | D(dst) | SH_IMM(24), DR(dst));
DR 181 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst));
DR 192 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL32 | T(src2) | D(dst) | SH_IMM(16), DR(dst)));
DR 193 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, DSRA32 | T(dst) | D(dst) | SH_IMM(16), DR(dst));
DR 195 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst));
DR 203 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL32 | T(src2) | D(dst) | SH_IMM(0), DR(dst)));
DR 204 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, DSRL32 | T(dst) | D(dst) | SH_IMM(0), DR(dst));
DR 208 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, SLL | T(src2) | D(dst) | SH_IMM(0), DR(dst));
DR 215 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, NOR | S(src2) | T(src2) | D(dst), DR(dst)));
DR 224 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DCLZ, CLZ) | S(src2) | T(dst) | D(dst), DR(dst)));
DR 231 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src2) | TA(0) | D(TMP_REG1), DR(TMP_REG1)));
DR 235 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | SA(0) | T(dst) | IMM(-1), DR(dst)));
DR 237 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(dst) | T(dst) | IMM(1), DR(dst)));
DR 265 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(src1) | T(dst) | IMM(src2), DR(dst)));
DR 276 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | D(dst), DR(dst)));
DR 284 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DSLL32, SLL) | TA(ULESS_FLAG) | D(TMP_REG1) | SH_IMM(31), DR(TMP_REG1)));
DR 299 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(src1) | T(dst) | IMM(src2), DR(dst)));
DR 304 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | D(dst), DR(dst)));
DR 309 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(dst) | TA(ULESS_FLAG) | D(dst), DR(dst)));
DR 320 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
DR 338 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(src1) | T(dst) | IMM(-src2), DR(dst)));
DR 355 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DSUBU, SUBU) | S(src1) | T(src2) | D(dst), DR(dst)));
DR 360 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DSLL32, SLL) | TA(ULESS_FLAG) | D(TMP_REG1) | SH_IMM(31), DR(TMP_REG1)));
DR 367 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
DR 376 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(src1) | T(dst) | IMM(-src2), DR(dst)));
DR 382 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DSUBU, SUBU) | S(src1) | T(src2) | D(dst), DR(dst)));
DR 388 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, SELECT_OP(DSUBU, SUBU) | S(dst) | TA(ULESS_FLAG) | D(dst), DR(dst)));
DR 396 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, MUL | S(src1) | T(src2) | D(dst), DR(dst));
DR 398 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, MFLO | D(dst), DR(dst));
DR 401 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, MFLO | D(dst), DR(dst));
DR 406 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, MFLO | D(dst), DR(dst)));
DR 441 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, LUI | T(dst) | IMM(init_value >> 48), DR(dst)));
DR 442 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, ORI | S(dst) | T(dst) | IMM(init_value >> 32), DR(dst)));
DR 443 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL | T(dst) | D(dst) | SH_IMM(16), DR(dst)));
DR 444 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, ORI | S(dst) | T(dst) | IMM(init_value >> 16), DR(dst)));
DR 445 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c FAIL_IF(push_inst(compiler, DSLL | T(dst) | D(dst) | SH_IMM(16), DR(dst)));
DR 446 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c return push_inst(compiler, ORI | S(dst) | T(dst) | IMM(init_value), DR(dst));
DR 562 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDIU_W | S(SLJIT_SP) | T(SLJIT_SP) | IMM(-local_size), DR(SLJIT_SP)));
DR 566 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size));
DR 567 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
DR 568 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, SUBU_W | S(SLJIT_SP) | T(TMP_REG1) | D(SLJIT_SP), DR(SLJIT_SP)));
DR 588 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | SA(4) | TA(0) | D(SLJIT_S0), DR(SLJIT_S0)));
DR 590 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | SA(5) | TA(0) | D(SLJIT_S1), DR(SLJIT_S1)));
DR 592 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | SA(6) | TA(0) | D(SLJIT_S2), DR(SLJIT_S2)));
DR 628 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size));
DR 629 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | T(TMP_REG1) | D(TMP_REG1), DR(TMP_REG1)));
DR 639 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(i) | IMM(offs), DR(i)));
DR 645 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(i) | IMM(offs), DR(i)));
DR 756 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c tmp_ar = DR(TMP_REG1);
DR 763 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c if ((flags & WRITE_BACK) && reg_ar == DR(base)) {
DR 764 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c SLJIT_ASSERT(!(flags & LOAD_DATA) && DR(TMP_REG1) != reg_ar);
DR 765 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | SA(reg_ar) | TA(0) | D(TMP_REG1), DR(TMP_REG1)));
DR 766 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c reg_ar = DR(TMP_REG1);
DR 778 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(TMP_REG3), DR(TMP_REG3)));
DR 787 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(base), DR(base)));
DR 796 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(arg)) | D(TMP_REG3) | SH_IMM(argw), DR(TMP_REG3)));
DR 803 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(!argw ? OFFS_REG(arg) : TMP_REG3) | D(TMP_REG3), DR(TMP_REG3)));
DR 804 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c tmp_ar = DR(TMP_REG3);
DR 810 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(!argw ? OFFS_REG(arg) : TMP_REG3) | D(base), DR(base)));
DR 816 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c if (reg_ar == DR(base)) {
DR 817 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c SLJIT_ASSERT(!(flags & LOAD_DATA) && DR(TMP_REG1) != reg_ar);
DR 821 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c return push_inst(compiler, ADDIU_W | S(base) | T(base) | IMM(argw), DR(base));
DR 824 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | SA(reg_ar) | TA(0) | D(TMP_REG1), DR(TMP_REG1)));
DR 825 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c reg_ar = DR(TMP_REG1);
DR 830 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDIU_W | S(base) | T(base) | IMM(argw), DR(base)));
DR 835 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDIU_W | S(TMP_REG3) | T(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
DR 838 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(base), DR(base)));
DR 843 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(load_immediate(compiler, DR(TMP_REG3), argw));
DR 844 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(base), DR(base)));
DR 852 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDIU_W | S(TMP_REG3) | T(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
DR 860 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDIU_W | S(TMP_REG3) | T(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
DR 864 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(load_immediate(compiler, DR(TMP_REG3), argw));
DR 873 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | S(TMP_REG3) | T(base) | D(TMP_REG3), DR(TMP_REG3)));
DR 928 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c else if ((dst & SLJIT_MEM) && !getput_arg_fast(compiler, flags | ARG_TEST, DR(TMP_REG1), dst, dstw))
DR 961 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(load_immediate(compiler, DR(TMP_REG1), src1w));
DR 968 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c if (getput_arg_fast(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w))
DR 985 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(load_immediate(compiler, DR(sugg_src2_r), src2w));
DR 996 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c if (getput_arg_fast(compiler, flags | LOAD_DATA, DR(sugg_src2_r), src2, src2w))
DR 1006 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG2), src2, src2w, src1, src1w));
DR 1007 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, dst, dstw));
DR 1010 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, src2, src2w));
DR 1011 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG2), src2, src2w, dst, dstw));
DR 1015 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, dst, dstw));
DR 1017 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(sugg_src2_r), src2, src2w, dst, dstw));
DR 1023 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c getput_arg_fast(compiler, flags, DR(dst_r), dst, dstw);
DR 1026 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c return getput_arg(compiler, flags, DR(dst_r), dst, dstw, 0, 0);
DR 1054 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, MFLO | D(SLJIT_R0), DR(SLJIT_R0)));
DR 1055 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c return push_inst(compiler, MFHI | D(SLJIT_R1), DR(SLJIT_R1));
DR 1072 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, MFLO | D(SLJIT_R0), DR(SLJIT_R0)));
DR 1073 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c return push_inst(compiler, MFHI | D(SLJIT_R1), DR(SLJIT_R1));
DR 1345 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(load_immediate(compiler, DR(TMP_REG1), srcw));
DR 1547 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c return push_inst(compiler, ADDU_W | SA(RETURN_ADDR_REG) | TA(0) | D(dst), DR(dst));
DR 1702 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c SLJIT_ASSERT(DR(PIC_ADDR_REG) == 25 && PIC_ADDR_REG == TMP_REG2);
DR 1716 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c PTR_FAIL_IF(load_immediate(compiler, DR(TMP_REG1), src1w)); \
DR 1726 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c PTR_FAIL_IF(load_immediate(compiler, DR(TMP_REG2), src2w)); \
DR 1750 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c PTR_FAIL_IF(emit_op_mem2(compiler, flags, DR(TMP_REG1), src1, src1w, src2, src2w));
DR 1754 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c PTR_FAIL_IF(emit_op_mem2(compiler, flags, DR(TMP_REG2), src2, src2w, 0, 0));
DR 1767 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c if (compiler->delay_slot == MOVABLE_INS || (compiler->delay_slot != UNMOVABLE_INS && compiler->delay_slot != DR(src1) && compiler->delay_slot != DR(src2)))
DR 1822 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTIU : SLTI) | S(src1) | T(TMP_REG1) | IMM(src2w), DR(TMP_REG1)));
DR 1825 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTU : SLT) | S(src1) | T(src2) | D(TMP_REG1), DR(TMP_REG1)));
DR 1832 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTIU : SLTI) | S(src2) | T(TMP_REG1) | IMM(src1w), DR(TMP_REG1)));
DR 1835 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTU : SLT) | S(src2) | T(src1) | D(TMP_REG1), DR(TMP_REG1)));
DR 1953 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c if (DR(src) != 4)
DR 1956 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | S(src) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
DR 1960 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c SLJIT_ASSERT(DR(PIC_ADDR_REG) == 25 && PIC_ADDR_REG == TMP_REG2);
DR 1963 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(load_immediate(compiler, DR(PIC_ADDR_REG), srcw));
DR 2026 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c sugg_dst_ar = DR((op < SLJIT_ADD && FAST_IS_REG(dst)) ? dst : TMP_REG2);
DR 2032 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(emit_op_mem2(compiler, mem_type | LOAD_DATA, DR(TMP_REG1), src, srcw, dst, dstw));
DR 2098 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c if (DR(TMP_REG2) != dst_ar)
DR 2099 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c FAIL_IF(push_inst(compiler, ADDU_W | SA(dst_ar) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
DR 30 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, OR | D(dst) | S1(0) | IMM(imm), DR(dst));
DR 32 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, SETHI | D(dst) | ((imm >> 10) & 0x3fffff), DR(dst)));
DR 33 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return (imm & 0x3ff) ? push_inst(compiler, OR | D(dst) | S1(dst) | IMM_ARG | (imm & 0x3ff), DR(dst)) : SLJIT_SUCCESS;
DR 50 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, OR | D(dst) | S1(0) | S2(src2), DR(dst));
DR 58 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, AND | D(dst) | S1(src2) | IMM(0xff), DR(dst));
DR 59 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(24), DR(dst)));
DR 60 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, SRA | D(dst) | S1(dst) | IMM(24), DR(dst));
DR 70 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(16), DR(dst)));
DR 71 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, (op == SLJIT_MOV_SH ? SRA : SRL) | D(dst) | S1(dst) | IMM(16), DR(dst));
DR 79 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, XNOR | (flags & SET_FLAGS) | D(dst) | S1(0) | S2(src2), DR(dst) | (flags & SET_FLAGS));
DR 85 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, OR | D(TMP_REG1) | S1(0) | S2(src2), DR(TMP_REG1)));
DR 88 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, OR | D(dst) | S1(0) | IMM(-1), DR(dst)));
DR 92 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, SLL | D(TMP_REG1) | S1(TMP_REG1) | IMM(1), DR(TMP_REG1)));
DR 97 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, ADD | (flags & SET_FLAGS) | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst) | (flags & SET_FLAGS));
DR 100 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, ADDC | (flags & SET_FLAGS) | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst) | (flags & SET_FLAGS));
DR 103 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, SUB | (flags & SET_FLAGS) | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst) | (flags & SET_FLAGS));
DR 106 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, SUBC | (flags & SET_FLAGS) | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst) | (flags & SET_FLAGS));
DR 109 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, SMUL | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst)));
DR 112 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, SRA | D(TMP_REG1) | S1(dst) | IMM(31), DR(TMP_REG1)));
DR 113 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, RDY | D(TMP_LINK), DR(TMP_LINK)));
DR 117 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, AND | (flags & SET_FLAGS) | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst) | (flags & SET_FLAGS));
DR 120 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, OR | (flags & SET_FLAGS) | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst) | (flags & SET_FLAGS));
DR 123 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, XOR | (flags & SET_FLAGS) | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst) | (flags & SET_FLAGS));
DR 126 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst)));
DR 130 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, SRL | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst)));
DR 134 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, SRA | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst)));
DR 144 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c FAIL_IF(push_inst(compiler, SETHI | D(dst) | ((init_value >> 10) & 0x3fffff), DR(dst)));
DR 145 ext/pcre/pcrelib/sljit/sljitNativeSPARC_32.c return push_inst(compiler, OR | D(dst) | S1(dst) | IMM_ARG | (init_value & 0x3ff), DR(dst));
DR 522 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS));
DR 581 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c FAIL_IF(push_inst(compiler, SLL_W | D(arg2) | S1(OFFS_REG(arg)) | IMM_ARG | argw, DR(arg2)));
DR 588 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c FAIL_IF(push_inst(compiler, ADD | D(TMP_REG3) | S1(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
DR 607 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c delay_slot = ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS;
DR 613 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c return push_inst(compiler, ADD | D(base) | S1(base) | S2(arg2), DR(base));
DR 775 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c FAIL_IF(push_inst(compiler, (op == SLJIT_LUMUL ? UMUL : SMUL) | D(SLJIT_R0) | S1(SLJIT_R0) | S2(SLJIT_R1), DR(SLJIT_R0)));
DR 776 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c return push_inst(compiler, RDY | D(SLJIT_R1), DR(SLJIT_R1));
DR 786 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c FAIL_IF(push_inst(compiler, SRA | D(TMP_REG1) | S1(SLJIT_R0) | IMM(31), DR(TMP_REG1)));
DR 789 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c FAIL_IF(push_inst(compiler, OR | D(TMP_REG2) | S1(0) | S2(SLJIT_R0), DR(TMP_REG2)));
DR 790 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c FAIL_IF(push_inst(compiler, (op == SLJIT_LUDIV ? UDIV : SDIV) | D(SLJIT_R0) | S1(SLJIT_R0) | S2(SLJIT_R1), DR(SLJIT_R0)));
DR 791 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c FAIL_IF(push_inst(compiler, SMUL | D(SLJIT_R1) | S1(SLJIT_R0) | S2(SLJIT_R1), DR(SLJIT_R1)));
DR 792 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c FAIL_IF(push_inst(compiler, SUB | D(SLJIT_R1) | S1(TMP_REG2) | S2(SLJIT_R1), DR(SLJIT_R1)));
DR 1185 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c return push_inst(compiler, OR | D(dst) | S1(0) | S2(TMP_LINK), DR(dst));
DR 1198 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c FAIL_IF(push_inst(compiler, OR | D(TMP_LINK) | S1(0) | S2(src), DR(TMP_LINK)));