ARGSIZE_F         387 core/CodegenLIR.cpp             if ((argt & ARGSIZE_MASK_ANY) == ARGSIZE_F) {
ARGSIZE_F         889 core/CodegenLIR.cpp                 AvmAssert((sz == ARGSIZE_I || sz == ARGSIZE_U || sz == ARGSIZE_Q || sz == ARGSIZE_F) &&
ARGSIZE_F         605 nanojit/NativeARM.cpp     if (sz == ARGSIZE_F) {
ARGSIZE_F         762 nanojit/NativeARM.cpp         NanoAssert(sz == ARGSIZE_F);
ARGSIZE_F         877 nanojit/NativeARM.cpp         if (rsize == ARGSIZE_F) {
ARGSIZE_F         744 nanojit/NativePPC.cpp             } else if (sz == ARGSIZE_F) {
ARGSIZE_F         809 nanojit/NativePPC.cpp         else if (sz == ARGSIZE_F) {
ARGSIZE_F         193 nanojit/NativeSparc.cpp                 if (sz == ARGSIZE_F) {
ARGSIZE_F         906 nanojit/NativeX64.cpp             else if (sz == ARGSIZE_F && arg_index < NumArgRegs) {
ARGSIZE_F         912 nanojit/NativeX64.cpp             else if (sz == ARGSIZE_F && fr < XMM8) {
ARGSIZE_F         297 nanojit/Nativei386.cpp             if (n < max_regs && sz != ARGSIZE_F) {
ARGSIZE_F        1574 nanojit/Nativei386.cpp             NanoAssert(sz == ARGSIZE_F);
ARGSIZE_F         951 nanojit/Nativei386.h   debug_only(if ((c->_argtypes & ARGSIZE_MASK_ANY)==ARGSIZE_F) fpu_push();)\
ARGSIZE_F         960 nanojit/Nativei386.h   debug_only(if ((c->_argtypes & ARGSIZE_MASK_ANY)==ARGSIZE_F) fpu_push();)\