OPER_REG_OP_ORDER   58 src/ia32/disasm-ia32.cc   {0x01, "add", OPER_REG_OP_ORDER},
OPER_REG_OP_ORDER   60 src/ia32/disasm-ia32.cc   {0x09, "or", OPER_REG_OP_ORDER},
OPER_REG_OP_ORDER   63 src/ia32/disasm-ia32.cc   {0x21, "and", OPER_REG_OP_ORDER},
OPER_REG_OP_ORDER   65 src/ia32/disasm-ia32.cc   {0x29, "sub", OPER_REG_OP_ORDER},
OPER_REG_OP_ORDER   68 src/ia32/disasm-ia32.cc   {0x31, "xor", OPER_REG_OP_ORDER},
OPER_REG_OP_ORDER   70 src/ia32/disasm-ia32.cc   {0x38, "cmpb", OPER_REG_OP_ORDER},
OPER_REG_OP_ORDER  500 src/ia32/disasm-ia32.cc     case OPER_REG_OP_ORDER: {
OPER_REG_OP_ORDER   64 src/x64/disasm-x64.cc   { 0x01, OPER_REG_OP_ORDER,      "add" },
OPER_REG_OP_ORDER   68 src/x64/disasm-x64.cc   { 0x09, OPER_REG_OP_ORDER,      "or" },
OPER_REG_OP_ORDER   72 src/x64/disasm-x64.cc   { 0x11, OPER_REG_OP_ORDER,      "adc" },
OPER_REG_OP_ORDER   76 src/x64/disasm-x64.cc   { 0x19, OPER_REG_OP_ORDER,      "sbb" },
OPER_REG_OP_ORDER   80 src/x64/disasm-x64.cc   { 0x21, OPER_REG_OP_ORDER,      "and" },
OPER_REG_OP_ORDER   84 src/x64/disasm-x64.cc   { 0x29, OPER_REG_OP_ORDER,      "sub" },
OPER_REG_OP_ORDER   88 src/x64/disasm-x64.cc   { 0x31, OPER_REG_OP_ORDER,      "xor" },
OPER_REG_OP_ORDER   92 src/x64/disasm-x64.cc   { 0x39, OPER_REG_OP_ORDER,      "cmp" },
OPER_REG_OP_ORDER  101 src/x64/disasm-x64.cc   { 0x89, OPER_REG_OP_ORDER,      "mov" },
OPER_REG_OP_ORDER  628 src/x64/disasm-x64.cc     case OPER_REG_OP_ORDER: {