SPECIAL           281 src/mips/assembler-mips-inl.h                           ((instr2 & kOpcodeMask) == SPECIAL &&
SPECIAL           539 src/mips/assembler-mips.cc       (opcode == SPECIAL && rt_field == 0 &&
SPECIAL           556 src/mips/assembler-mips.cc   return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JR;
SPECIAL           560 src/mips/assembler-mips.cc   return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JALR;
SPECIAL          1144 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR);
SPECIAL          1164 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, zero_reg, rd, 0, JALR);
SPECIAL          1200 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, ADDU);
SPECIAL          1210 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, SUBU);
SPECIAL          1220 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULT);
SPECIAL          1225 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULTU);
SPECIAL          1230 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIV);
SPECIAL          1235 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIVU);
SPECIAL          1242 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, AND);
SPECIAL          1253 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, OR);
SPECIAL          1264 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, XOR);
SPECIAL          1275 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, NOR);
SPECIAL          1289 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, SLL);
SPECIAL          1294 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLLV);
SPECIAL          1299 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, SRL);
SPECIAL          1304 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRLV);
SPECIAL          1309 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, SRA);
SPECIAL          1314 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRAV);
SPECIAL          1322 src/mips/assembler-mips.cc   Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift)
SPECIAL          1332 src/mips/assembler-mips.cc   Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift)
SPECIAL          1469 src/mips/assembler-mips.cc   Instr break_instr = SPECIAL | BREAK | (code << 6);
SPECIAL          1491 src/mips/assembler-mips.cc   Instr instr = SPECIAL | TGE | rs.code() << kRsShift
SPECIAL          1499 src/mips/assembler-mips.cc   Instr instr = SPECIAL | TGEU | rs.code() << kRsShift
SPECIAL          1508 src/mips/assembler-mips.cc       SPECIAL | TLT | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
SPECIAL          1516 src/mips/assembler-mips.cc       SPECIAL | TLTU | rs.code() << kRsShift
SPECIAL          1525 src/mips/assembler-mips.cc       SPECIAL | TEQ | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
SPECIAL          1533 src/mips/assembler-mips.cc       SPECIAL | TNE | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
SPECIAL          1541 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFHI);
SPECIAL          1546 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFLO);
SPECIAL          1552 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLT);
SPECIAL          1557 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLTU);
SPECIAL          1573 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVZ);
SPECIAL          1578 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVN);
SPECIAL          1585 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVCI);
SPECIAL          1592 src/mips/assembler-mips.cc   GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVCI);
SPECIAL          2234 src/mips/assembler-mips.cc       *(p+2) = SPECIAL | rs_field | rd_field | JALR;
SPECIAL          2245 src/mips/assembler-mips.cc       *(p+2) = SPECIAL | rs_field | JR;
SPECIAL          2270 src/mips/assembler-mips.cc     *(p+2) = SPECIAL | rs_field | rd_field | JALR;
SPECIAL          2277 src/mips/assembler-mips.cc     *(p+2) = SPECIAL | rs_field | JR;
SPECIAL           175 src/mips/constants-mips.cc     case SPECIAL:
SPECIAL           203 src/mips/constants-mips.cc     case SPECIAL:
SPECIAL           217 src/mips/constants-mips.cc   if (OpcodeFieldRaw() != SPECIAL) {
SPECIAL           238 src/mips/constants-mips.cc     case SPECIAL:
SPECIAL           588 src/mips/constants-mips.h const Instr rtCallRedirInstr = SPECIAL | BREAK | call_rt_redirected << 6;
SPECIAL           735 src/mips/constants-mips.h       case SPECIAL:
SPECIAL           284 src/mips/disasm-mips.cc   if (instr->OpcodeFieldRaw() != SPECIAL)
SPECIAL           621 src/mips/disasm-mips.cc     case SPECIAL:
SPECIAL            86 src/mips/simulator-mips.cc   static const Instr kBreakpointInstr = SPECIAL | BREAK | 0xfffff << 6;
SPECIAL          1743 src/mips/simulator-mips.cc     case SPECIAL:
SPECIAL          2188 src/mips/simulator-mips.cc     case SPECIAL: