COP1              517 src/mips/assembler-mips.cc       (opcode == COP1 && rs_field == BC1) ||  // Coprocessor branch.
COP1             1653 src/mips/assembler-mips.cc   GenInstrRegister(COP1, MTC1, rt, fs, f0);
COP1             1658 src/mips/assembler-mips.cc   GenInstrRegister(COP1, MFC1, rt, fs, f0);
COP1             1663 src/mips/assembler-mips.cc   GenInstrRegister(COP1, CTC1, rt, fs);
COP1             1668 src/mips/assembler-mips.cc   GenInstrRegister(COP1, CFC1, rt, fs);
COP1             1682 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, ft, fs, fd, ADD_D);
COP1             1687 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, ft, fs, fd, SUB_D);
COP1             1692 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, ft, fs, fd, MUL_D);
COP1             1697 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, ft, fs, fd, DIV_D);
COP1             1702 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, ABS_D);
COP1             1707 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, MOV_D);
COP1             1712 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, NEG_D);
COP1             1717 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, SQRT_D);
COP1             1724 src/mips/assembler-mips.cc   GenInstrRegister(COP1, S, f0, fs, fd, CVT_W_S);
COP1             1729 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, CVT_W_D);
COP1             1734 src/mips/assembler-mips.cc   GenInstrRegister(COP1, S, f0, fs, fd, TRUNC_W_S);
COP1             1739 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, TRUNC_W_D);
COP1             1744 src/mips/assembler-mips.cc   GenInstrRegister(COP1, S, f0, fs, fd, ROUND_W_S);
COP1             1749 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, ROUND_W_D);
COP1             1754 src/mips/assembler-mips.cc   GenInstrRegister(COP1, S, f0, fs, fd, FLOOR_W_S);
COP1             1759 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, FLOOR_W_D);
COP1             1764 src/mips/assembler-mips.cc   GenInstrRegister(COP1, S, f0, fs, fd, CEIL_W_S);
COP1             1769 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, CEIL_W_D);
COP1             1775 src/mips/assembler-mips.cc   GenInstrRegister(COP1, S, f0, fs, fd, CVT_L_S);
COP1             1781 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, CVT_L_D);
COP1             1787 src/mips/assembler-mips.cc   GenInstrRegister(COP1, S, f0, fs, fd, TRUNC_L_S);
COP1             1793 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, TRUNC_L_D);
COP1             1798 src/mips/assembler-mips.cc   GenInstrRegister(COP1, S, f0, fs, fd, ROUND_L_S);
COP1             1803 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, ROUND_L_D);
COP1             1808 src/mips/assembler-mips.cc   GenInstrRegister(COP1, S, f0, fs, fd, FLOOR_L_S);
COP1             1813 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, FLOOR_L_D);
COP1             1818 src/mips/assembler-mips.cc   GenInstrRegister(COP1, S, f0, fs, fd, CEIL_L_S);
COP1             1823 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, CEIL_L_D);
COP1             1828 src/mips/assembler-mips.cc   GenInstrRegister(COP1, W, f0, fs, fd, CVT_S_W);
COP1             1834 src/mips/assembler-mips.cc   GenInstrRegister(COP1, L, f0, fs, fd, CVT_S_L);
COP1             1839 src/mips/assembler-mips.cc   GenInstrRegister(COP1, D, f0, fs, fd, CVT_S_D);
COP1             1844 src/mips/assembler-mips.cc   GenInstrRegister(COP1, W, f0, fs, fd, CVT_D_W);
COP1             1850 src/mips/assembler-mips.cc   GenInstrRegister(COP1, L, f0, fs, fd, CVT_D_L);
COP1             1855 src/mips/assembler-mips.cc   GenInstrRegister(COP1, S, f0, fs, fd, CVT_D_S);
COP1             1865 src/mips/assembler-mips.cc   Instr instr = COP1 | fmt | ft.code() << 16 | fs.code() << kFsShift
COP1             1884 src/mips/assembler-mips.cc   Instr instr = COP1 | BC1 | cc << 18 | 0 << 16 | (offset & kImm16Mask);
COP1             1892 src/mips/assembler-mips.cc   Instr instr = COP1 | BC1 | cc << 18 | 1 << 16 | (offset & kImm16Mask);
COP1              297 src/mips/constants-mips.cc     case COP1:    // Coprocessor instructions.
COP1              738 src/mips/constants-mips.h       case COP1:
COP1              464 src/mips/disasm-mips.cc     case COP1:    // Coprocessor instructions.
COP1              801 src/mips/disasm-mips.cc     case COP1:
COP1             1711 src/mips/simulator-mips.cc     case COP1:    // Coprocessor instructions.
COP1             1965 src/mips/simulator-mips.cc     case COP1:
COP1             2339 src/mips/simulator-mips.cc     case COP1: