GPR_REG           710 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 			| TA(reg_ar) | IMM(argw), ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? reg_ar : MOVABLE_INS));
GPR_REG           752 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 	if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) {
GPR_REG           718 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	((inst) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
GPR_REG           722 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	(((inst) & ~(INT_ALIGNED | UPDATE_REQ)) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
GPR_REG           954 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	tmp_r = ((inp_flags & LOAD_DATA) && ((inp_flags) & MEM_MASK) <= GPR_REG) ? reg : TMP_REG1;
GPR_REG           520 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 				| ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg))
GPR_REG           522 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 				((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS));
GPR_REG           577 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 			else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base && reg != OFFS_REG(arg))
GPR_REG           598 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 			else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base)
GPR_REG           606 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 	dest = ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg));
GPR_REG           607 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 	delay_slot = ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS;
GPR_REG          1385 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 	if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA))