MEM_MASK          709 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(arg & REG_MASK)
MEM_MASK          710 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 			| TA(reg_ar) | IMM(argw), ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? reg_ar : MOVABLE_INS));
MEM_MASK          752 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 	if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) {
MEM_MASK          773 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 					return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
MEM_MASK          779 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 						return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
MEM_MASK          782 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 					return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
MEM_MASK          788 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 					return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
MEM_MASK          808 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 			return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
MEM_MASK          811 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
MEM_MASK          819 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 				FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar) | IMM(argw), MOVABLE_INS));
MEM_MASK          847 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
MEM_MASK          855 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
MEM_MASK          869 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
MEM_MASK          874 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
MEM_MASK          878 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 	return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
MEM_MASK          718 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	((inst) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
MEM_MASK          722 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	(((inst) & ~(INT_ALIGNED | UPDATE_REQ)) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
MEM_MASK          858 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 		inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
MEM_MASK          868 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	inst = data_transfer_insts[inp_flags & MEM_MASK];
MEM_MASK          883 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	inst = data_transfer_insts[inp_flags & MEM_MASK];
MEM_MASK          954 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	tmp_r = ((inp_flags & LOAD_DATA) && ((inp_flags) & MEM_MASK) <= GPR_REG) ? reg : TMP_REG1;
MEM_MASK          978 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 		inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
MEM_MASK          986 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	inst = data_transfer_insts[inp_flags & MEM_MASK];
MEM_MASK         1059 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 		inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
MEM_MASK         1075 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 		inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
MEM_MASK         1104 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
MEM_MASK          519 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 			FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK]
MEM_MASK          520 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 				| ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg))
MEM_MASK          522 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 				((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS));
MEM_MASK          577 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 			else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base && reg != OFFS_REG(arg))
MEM_MASK          598 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 			else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base)
MEM_MASK          606 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 	dest = ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg));
MEM_MASK          607 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 	delay_slot = ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS;
MEM_MASK          609 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(arg2) | IMM(0), delay_slot);
MEM_MASK          611 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(base) | S2(arg2), delay_slot);
MEM_MASK          612 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 	FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(base) | S2(arg2), delay_slot));
MEM_MASK         1336 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, ADDR_TMP_mapped));
MEM_MASK         1338 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], ADDR_TMP_mapped, reg_ar));
MEM_MASK         1385 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 	if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA))
MEM_MASK         1406 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
MEM_MASK         1408 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
MEM_MASK         1417 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 							return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
MEM_MASK         1419 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 							return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
MEM_MASK         1424 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, tmp_ar);
MEM_MASK         1426 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], tmp_ar, reg_ar);
MEM_MASK         1432 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
MEM_MASK         1434 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
MEM_MASK         1455 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 				return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, tmp_ar);
MEM_MASK         1457 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 				return PB2(data_transfer_insts[flags & MEM_MASK], tmp_ar, reg_ar);
MEM_MASK         1463 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
MEM_MASK         1465 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
MEM_MASK         1475 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 					FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, ADDR_TMP_mapped));
MEM_MASK         1477 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 					FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], ADDR_TMP_mapped, reg_ar));
MEM_MASK         1511 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
MEM_MASK         1513 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
MEM_MASK         1525 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
MEM_MASK         1527 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
MEM_MASK         1544 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
MEM_MASK         1546 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
MEM_MASK         1555 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
MEM_MASK         1557 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
MEM_MASK         1563 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 		return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, tmp_ar);
MEM_MASK         1565 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 		return PB2(data_transfer_insts[flags & MEM_MASK], tmp_ar, reg_ar);