f0 1653 src/mips/assembler-mips.cc GenInstrRegister(COP1, MTC1, rt, fs, f0);
f0 1658 src/mips/assembler-mips.cc GenInstrRegister(COP1, MFC1, rt, fs, f0);
f0 1702 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, ABS_D);
f0 1707 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, MOV_D);
f0 1712 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, NEG_D);
f0 1717 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, SQRT_D);
f0 1724 src/mips/assembler-mips.cc GenInstrRegister(COP1, S, f0, fs, fd, CVT_W_S);
f0 1729 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, CVT_W_D);
f0 1734 src/mips/assembler-mips.cc GenInstrRegister(COP1, S, f0, fs, fd, TRUNC_W_S);
f0 1739 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, TRUNC_W_D);
f0 1744 src/mips/assembler-mips.cc GenInstrRegister(COP1, S, f0, fs, fd, ROUND_W_S);
f0 1749 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, ROUND_W_D);
f0 1754 src/mips/assembler-mips.cc GenInstrRegister(COP1, S, f0, fs, fd, FLOOR_W_S);
f0 1759 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, FLOOR_W_D);
f0 1764 src/mips/assembler-mips.cc GenInstrRegister(COP1, S, f0, fs, fd, CEIL_W_S);
f0 1769 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, CEIL_W_D);
f0 1775 src/mips/assembler-mips.cc GenInstrRegister(COP1, S, f0, fs, fd, CVT_L_S);
f0 1781 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, CVT_L_D);
f0 1787 src/mips/assembler-mips.cc GenInstrRegister(COP1, S, f0, fs, fd, TRUNC_L_S);
f0 1793 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, TRUNC_L_D);
f0 1798 src/mips/assembler-mips.cc GenInstrRegister(COP1, S, f0, fs, fd, ROUND_L_S);
f0 1803 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, ROUND_L_D);
f0 1808 src/mips/assembler-mips.cc GenInstrRegister(COP1, S, f0, fs, fd, FLOOR_L_S);
f0 1813 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, FLOOR_L_D);
f0 1818 src/mips/assembler-mips.cc GenInstrRegister(COP1, S, f0, fs, fd, CEIL_L_S);
f0 1823 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, CEIL_L_D);
f0 1828 src/mips/assembler-mips.cc GenInstrRegister(COP1, W, f0, fs, fd, CVT_S_W);
f0 1834 src/mips/assembler-mips.cc GenInstrRegister(COP1, L, f0, fs, fd, CVT_S_L);
f0 1839 src/mips/assembler-mips.cc GenInstrRegister(COP1, D, f0, fs, fd, CVT_S_D);
f0 1844 src/mips/assembler-mips.cc GenInstrRegister(COP1, W, f0, fs, fd, CVT_D_W);
f0 1850 src/mips/assembler-mips.cc GenInstrRegister(COP1, L, f0, fs, fd, CVT_D_L);
f0 1855 src/mips/assembler-mips.cc GenInstrRegister(COP1, S, f0, fs, fd, CVT_D_S);
f0 286 src/mips/assembler-mips.h const FPURegister f0 = { 0 }; // Return value in hard float mode.
f0 1096 src/mips/code-stubs-mips.cc __ sdc1(f0, FieldMemOperand(heap_number_result, HeapNumber::kValueOffset));
f0 2267 src/mips/code-stubs-mips.cc __ ConvertToInt32(a0, a1, a2, a3, f0, slow);
f0 2300 src/mips/code-stubs-mips.cc __ ConvertToInt32(v0, a1, a3, t0, f0, &impossible);
f0 2311 src/mips/code-stubs-mips.cc __ mtc1(a1, f0);
f0 2312 src/mips/code-stubs-mips.cc __ cvt_d_w(f0, f0);
f0 2313 src/mips/code-stubs-mips.cc __ sdc1(f0, FieldMemOperand(v0, HeapNumber::kValueOffset));
f0 2720 src/mips/code-stubs-mips.cc f0,
f0 2729 src/mips/code-stubs-mips.cc f0,
f0 2798 src/mips/code-stubs-mips.cc __ mtc1(a2, f0);
f0 2800 src/mips/code-stubs-mips.cc __ Cvt_d_uw(f0, f0, f22);
f0 2802 src/mips/code-stubs-mips.cc __ cvt_d_w(f0, f0);
f0 2807 src/mips/code-stubs-mips.cc __ sdc1(f0, FieldMemOperand(v0, HeapNumber::kValueOffset));
f0 2926 src/mips/code-stubs-mips.cc FPURegister double_scratch = f0;
f0 3115 src/mips/code-stubs-mips.cc f0,
f0 3124 src/mips/code-stubs-mips.cc f0,
f0 3672 src/mips/code-stubs-mips.cc const DoubleRegister double_result = f0;
f0 6879 src/mips/code-stubs-mips.cc __ ldc1(f0, MemOperand(a2, HeapNumber::kValueOffset));
f0 6886 src/mips/code-stubs-mips.cc __ BranchF(&fpu_eq, &unordered, eq, f0, f2);
f0 6889 src/mips/code-stubs-mips.cc __ BranchF(&fpu_lt, NULL, lt, f0, f2);
f0 200 src/mips/codegen-mips.cc __ mtc1(t5, f0);
f0 201 src/mips/codegen-mips.cc __ cvt_d_w(f0, f0);
f0 202 src/mips/codegen-mips.cc __ sdc1(f0, MemOperand(t3));
f0 208 src/mips/codegen-mips.cc f0,
f0 212 src/mips/codegen-mips.cc f0);
f0 883 src/mips/deoptimizer-mips.cc __ ldc1(f0, MemOperand(sp, src_offset));
f0 884 src/mips/deoptimizer-mips.cc __ sdc1(f0, MemOperand(a1, dst_offset));
f0 3091 src/mips/full-codegen-mips.cc __ sub_d(f0, f12, f14);
f0 3092 src/mips/full-codegen-mips.cc __ sdc1(f0, FieldMemOperand(s0, HeapNumber::kValueOffset));
f0 3218 src/mips/lithium-codegen-mips.cc ASSERT(ToDoubleRegister(instr->result()).is(f0));
f0 3253 src/mips/lithium-codegen-mips.cc ASSERT(ToDoubleRegister(instr->result()).is(f0));
f0 3305 src/mips/lithium-codegen-mips.cc __ sub_d(f0, f12, f14);
f0 1310 src/mips/lithium-mips.cc return MarkAsCall(DefineFixedDouble(result, f0),
f0 1321 src/mips/lithium-mips.cc return MarkAsCall(DefineFixedDouble(result, f0), instr);
f0 3452 src/mips/macro-assembler-mips.cc f0,
f0 3459 src/mips/macro-assembler-mips.cc sdc1(f0, MemOperand(scratch1, 0));
f0 3555 src/mips/macro-assembler-mips.cc Move(dst, f0); // Reg f0 is o32 ABI FP return value.
f0 986 src/mips/stub-cache-mips.cc __ mtc1(ival, f0);
f0 987 src/mips/stub-cache-mips.cc __ cvt_s_w(f0, f0);
f0 990 src/mips/stub-cache-mips.cc __ swc1(f0, MemOperand(scratch1, 0));
f0 2141 src/mips/stub-cache-mips.cc __ ldc1(f0, FieldMemOperand(v0, HeapNumber::kValueOffset));
f0 2148 src/mips/stub-cache-mips.cc __ floor_w_d(f0, f0);
f0 2176 src/mips/stub-cache-mips.cc __ mfc1(v0, f0);
f0 3660 src/mips/stub-cache-mips.cc __ lwc1(f0, MemOperand(t3, 0));
f0 3670 src/mips/stub-cache-mips.cc __ ldc1(f0, MemOperand(t3, 0));
f0 3719 src/mips/stub-cache-mips.cc __ mtc1(value, f0);
f0 3720 src/mips/stub-cache-mips.cc __ cvt_d_w(f0, f0);
f0 3721 src/mips/stub-cache-mips.cc __ sdc1(f0, FieldMemOperand(v0, HeapNumber::kValueOffset));
f0 3731 src/mips/stub-cache-mips.cc f0,
f0 3767 src/mips/stub-cache-mips.cc __ Cvt_d_uw(f0, value, f22);
f0 3769 src/mips/stub-cache-mips.cc __ sdc1(f0, FieldMemOperand(v0, HeapNumber::kValueOffset));
f0 3822 src/mips/stub-cache-mips.cc __ cvt_d_s(f0, f0);
f0 3823 src/mips/stub-cache-mips.cc __ sdc1(f0, FieldMemOperand(v0, HeapNumber::kValueOffset));
f0 3887 src/mips/stub-cache-mips.cc __ sdc1(f0, FieldMemOperand(v0, HeapNumber::kValueOffset));
f0 4031 src/mips/stub-cache-mips.cc f0, t2, t3, // These are: double_dst, dst1, dst2.
f0 4035 src/mips/stub-cache-mips.cc __ sdc1(f0, MemOperand(a3, 0));
f0 4074 src/mips/stub-cache-mips.cc __ ldc1(f0, FieldMemOperand(a0, HeapNumber::kValueOffset));
f0 4077 src/mips/stub-cache-mips.cc __ cvt_s_d(f0, f0);
f0 4080 src/mips/stub-cache-mips.cc __ swc1(f0, MemOperand(t8, 0));
f0 4084 src/mips/stub-cache-mips.cc __ sdc1(f0, MemOperand(t8, 0));
f0 4086 src/mips/stub-cache-mips.cc __ EmitECMATruncate(t3, f0, f2, t2, t1, t5);
f0 442 test/cctest/test-assembler-mips.cc __ cvt_d_w(f0, f12);
f0 443 test/cctest/test-assembler-mips.cc __ sdc1(f0, MemOperand(a0, OFFSET_OF(T, a)) );
f0 786 test/cctest/test-assembler-mips.cc __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, a)));
f0 789 test/cctest/test-assembler-mips.cc __ mfc1(t0, f0);
f0 795 test/cctest/test-assembler-mips.cc __ cvt_l_d(f0, f0);
f0 796 test/cctest/test-assembler-mips.cc __ mfc1(t0, f0); // f0 has LS 32 bits of long.
f0 1178 test/cctest/test-assembler-mips.cc __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, round_up_in))); \
f0 1179 test/cctest/test-assembler-mips.cc __ x##_w_d(f0, f0); \
f0 1180 test/cctest/test-assembler-mips.cc __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_up_out))); \
f0 1182 test/cctest/test-assembler-mips.cc __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, round_down_in))); \
f0 1183 test/cctest/test-assembler-mips.cc __ x##_w_d(f0, f0); \
f0 1184 test/cctest/test-assembler-mips.cc __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_down_out))); \
f0 1186 test/cctest/test-assembler-mips.cc __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, neg_round_up_in))); \
f0 1187 test/cctest/test-assembler-mips.cc __ x##_w_d(f0, f0); \
f0 1188 test/cctest/test-assembler-mips.cc __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_up_out))); \
f0 1190 test/cctest/test-assembler-mips.cc __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, neg_round_down_in))); \
f0 1191 test/cctest/test-assembler-mips.cc __ x##_w_d(f0, f0); \
f0 1192 test/cctest/test-assembler-mips.cc __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_down_out))); \
f0 1194 test/cctest/test-assembler-mips.cc __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, err1_in))); \
f0 1196 test/cctest/test-assembler-mips.cc __ x##_w_d(f0, f0); \
f0 1200 test/cctest/test-assembler-mips.cc __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, err2_in))); \
f0 1202 test/cctest/test-assembler-mips.cc __ x##_w_d(f0, f0); \
f0 1206 test/cctest/test-assembler-mips.cc __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, err3_in))); \
f0 1208 test/cctest/test-assembler-mips.cc __ x##_w_d(f0, f0); \
f0 1212 test/cctest/test-assembler-mips.cc __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, err4_in))); \
f0 1214 test/cctest/test-assembler-mips.cc __ x##_w_d(f0, f0); \
f0 1217 test/cctest/test-assembler-mips.cc __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_invalid_result)));
f0 4046 test/cctest/test-debug.cc v8::Local<v8::Function> f0 = CompileFunction(&env, src, "f0");
f0 4058 test/cctest/test-debug.cc f0->Call(env->Global(), 0, NULL);
f0 4069 test/cctest/test-debug.cc f0->Call(env->Global(), i, argv);