f14 1875 src/mips/assembler-mips.cc mtc1(zero_reg, f14); f14 1876 src/mips/assembler-mips.cc cvt_d_w(f14, f14); f14 1877 src/mips/assembler-mips.cc c(cond, D, src1, f14, 0); f14 300 src/mips/assembler-mips.h const FPURegister f14 = { 14 }; // Arg 1 in hard float mode. f14 605 src/mips/code-stubs-mips.cc __ mtc1(scratch1, f14); f14 606 src/mips/code-stubs-mips.cc __ cvt_d_w(f14, f14); f14 611 src/mips/code-stubs-mips.cc __ Move(a2, a3, f14); f14 640 src/mips/code-stubs-mips.cc a0, f14, a2, a3, heap_number_map, scratch1, scratch2, slow); f14 1085 src/mips/code-stubs-mips.cc __ Move(f14, a2, a3); f14 1326 src/mips/code-stubs-mips.cc __ mtc1(at, f14); f14 1327 src/mips/code-stubs-mips.cc __ cvt_d_w(f14, f14); f14 1367 src/mips/code-stubs-mips.cc __ ldc1(f14, FieldMemOperand(rhs, HeapNumber::kValueOffset)); f14 1393 src/mips/code-stubs-mips.cc __ Move(t0, t1, f14); f14 1460 src/mips/code-stubs-mips.cc __ Move(t0, t1, f14); f14 1505 src/mips/code-stubs-mips.cc __ Move(f14, a2, a3); f14 1516 src/mips/code-stubs-mips.cc __ BranchF(&equal, NULL, eq, f12, f14); f14 1517 src/mips/code-stubs-mips.cc __ BranchF(&less_than, NULL, lt, f12, f14); f14 1591 src/mips/code-stubs-mips.cc __ ldc1(f14, FieldMemOperand(rhs, HeapNumber::kValueOffset)); f14 1710 src/mips/code-stubs-mips.cc __ ldc1(f14, FieldMemOperand(probe, HeapNumber::kValueOffset)); f14 1711 src/mips/code-stubs-mips.cc __ BranchF(&load_result_from_cache, NULL, eq, f12, f14); f14 1826 src/mips/code-stubs-mips.cc __ BranchF(NULL, &nan, eq, f12, f14); f14 1830 src/mips/code-stubs-mips.cc __ c(OLT, D, f12, f14); f14 1838 src/mips/code-stubs-mips.cc __ c(EQ, D, f12, f14); f14 2669 src/mips/code-stubs-mips.cc __ add_d(f10, f12, f14); f14 2672 src/mips/code-stubs-mips.cc __ sub_d(f10, f12, f14); f14 2675 src/mips/code-stubs-mips.cc __ mul_d(f10, f12, f14); f14 2678 src/mips/code-stubs-mips.cc __ div_d(f10, f12, f14); f14 2964 src/mips/code-stubs-mips.cc f14, f14 2989 src/mips/code-stubs-mips.cc __ add_d(f10, f12, f14); f14 2992 src/mips/code-stubs-mips.cc __ sub_d(f10, f12, f14); f14 2995 src/mips/code-stubs-mips.cc __ mul_d(f10, f12, f14); f14 2998 src/mips/code-stubs-mips.cc __ div_d(f10, f12, f14); f14 3089 src/mips/full-codegen-mips.cc __ Move(f14, zero_reg, a1); f14 3091 src/mips/full-codegen-mips.cc __ sub_d(f0, f12, f14); f14 3303 src/mips/lithium-codegen-mips.cc __ Move(f14, zero_reg, a2); f14 3305 src/mips/lithium-codegen-mips.cc __ sub_d(f0, f12, f14); f14 3575 src/mips/macro-assembler-mips.cc ASSERT(!dreg1.is(f14)); f14 3576 src/mips/macro-assembler-mips.cc Move(f14, dreg2); f14 3580 src/mips/macro-assembler-mips.cc Move(f14, dreg2); f14 1449 src/mips/simulator-mips.cc arg2 = get_fpu_register(f14); f14 303 test/cctest/test-assembler-mips.cc __ mtc1(t0, f14); f14 304 test/cctest/test-assembler-mips.cc __ cvt_d_w(f14, f14); // f14 = 120.0. f14 305 test/cctest/test-assembler-mips.cc __ mul_d(f10, f10, f14); f14 311 test/cctest/test-assembler-mips.cc __ sqrt_d(f14, f12); f14 312 test/cctest/test-assembler-mips.cc __ sdc1(f14, MemOperand(a0, OFFSET_OF(T, g)) ); f14 446 test/cctest/test-assembler-mips.cc __ mtc1(t1, f14); f14 447 test/cctest/test-assembler-mips.cc __ cvt_d_w(f2, f14);